Monday, 6 February 2017
Computer Architecture and Organization Details
The Brief History of Computers
The Electronic Numerical Integrator and Computer (ENIAC) was the world’s first general-purpose digital computer. Because of the basic programming of the computer, the chore of entering and altering programs for the ENIAC was very difficult. To fix this problem, the Electronic Discrete Variable Computer (EDVC) was created to make programming much easier. These computers stored data instructions in their memory, making directions for various tasks easily obtainable when needed. The EDVCs followed the concept of stored-programs. The architecture of these computers included general purpose registers, the status word, the instruction set, and the address space. Today’s computers use multiple registers rather than a single accumulator and cache memory, which improves the performance of the CPU and enhances computer organization. Some of the registers used in CPUs are as followed:
Memory buffer register (MBR): Stores the data to be transferred to and from the immediate access memory. MBR stores copies of allotted memory locations specified by the memory address register.
Memory address register (MAR): MAR is a CPU register that holds the address for the memory location of data.
Program counter (PC): A register that holds the address of the next instruction that is to be executed.
Instruction register (IR): Stores the location of the instruction being executed.
Accumulator (AC): Holds the temporary operands and results in ALU operations.
Instruction buffer register (IBR): Used to hold the temporary right-hand instructions from a word in memory.
The above information is reviewed in the Computational Tools and Techniques topic in FE exam review courses.
Working Principle of Pipeline Processors
The pipeline is an effective way of organizing the parallel execution of an instruction into a computer system. When using a pipeline process, the processor receives its first instruction from its memory, performs the execution, and then moves to the next instruction to be executed from memory. This process is repeated until the task is complete. While fetching an instruction, the arithmetic fragment of the processor is idle. While using a pipeline in the processor, the processor allows the next instruction to be fetched while the CPU is performing arithmetic operations, holding the process data in a buffer until each operation is performed. The fetching of the next instruction is a continuous process. Flowcharts and simple programming techniques are discussed in our Fundamentals of Engineering exam review courses.
The Role of Cache Memory in Pipeline Process
Cache memory is an additional memory system that temporarily stores frequently-accessed instructions and data for faster processing by the CPU of a computer. Both the main memory and cache are internal and randomly-accessed memories that use semiconductor-based transistor circuits. The cache holds a copy of frequently-used data or program codes that are stored in the main memory. The key purpose of cache memory is to store program instructions that are frequently referenced by software during specific processes. This process and concept of computational tools and techniques is important for FE exam preparation. Most of the topics related to spreadsheets and calculations are also reviewed in our FE exam review courses.